ÿþ<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> <html xmlns="http://www.w3.org/1999/xhtml"><!-- InstanceBegin template="/Templates/template.dwt" codeOutsideHTMLIsLocked="false" --> <!-- DW6 --> <head> <!-- Copyright 2005 Macromedia, Inc. All rights reserved. --> <!-- InstanceBeginEditable name="doctitle" --> <title>NCRG : People</title> <!-- InstanceEndEditable --> <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1" /> <script language="JavaScript" type="text/javascript"> //--------------- LOCALIZEABLE GLOBALS --------------- var d=new Date(); var monthname=new Array("January","February","March","April","May","June","July","August","September","October","November","December"); //Ensure correct for language. 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Technologies such as sub-45nm CMOS, and several flavors of Quantum Cellular Automata (QCA), to name a few, are systems that operate in a novel manner and could have substantial impact on the computing world. We at the NCRG see a significant need to investigate such devices, and therefore, endeavor into several key areas throughout the design automation process, such as model creation, low-high level architecture design, the fabrication of novel nano-devices, and the experimental characterization of those nano-devices. The theoretical foundation of our research framework is graph-based probabilistic models like Bayesian Networks, representing the dependencies in logic that characterizes the physical behavior of the device. We extensively use E-Beam lithography to fabricate our devices and analyze them using AFM, at our University s Nano-Materials and Nano-Science Research Center (NNRC). </p> <p>The Nano Computing Research Group is located at Engineering Building II (ENB349a) and pioneers in research areas such as:</p> <ul> <li>Nano-CMOS</li> <li>Emerging Devices</li> <li>Error-Power Trade-Off</li> <li>Bayesian Networks</li> </ul> <p>&nbsp;&nbsp;<img src="images/gate.jpg" alt="Gate Level Representation" width="140" height="120" />&nbsp;&nbsp;<img src="images/nanomagnets.jpg" width="140" height="120" />&nbsp;&nbsp;&nbsp;<img src="images/Magnets.jpg" width="140" height="130" /></p> <form id="form1" name="form1" method="post" action=""> <p>Abstract Representation of a 2 Level Majority Gate Circuit. SEM Micrograph of a Fabricated Complex Circuit Composed of Majority Gates. The SEM and MFM View of a Small Magnetic Chain. </p> </form> <p>&nbsp;&nbsp;<img src="images/CMOS_Reliability.jpg" width="200" height="160" />&nbsp;<img src="images/Reliability-centric CAD.jpg" width="200" height="160" /></p> <p>&nbsp;</p> <p>CMOS Reliability of Individual Gate level including SEU, Dynamic Faults. The Stochastic Design Optimization Framework. </p></td> </tr> <!-- InstanceEndEditable --> </table> &nbsp;&nbsp; </td> <td width="0"><img src="file:///U|/nanosite/images/mm_spacer.gif" alt="" width="1" height="1" border="0" /></td> </tr> </table> </body> <!-- InstanceEnd --></html>